Direct memory access
(DMA) is a technique that allows an input/output (I/O) device to send to or
receive data directly from the main memory, bypassing the CPU to speed up
memory operations.
With DMA, the CPU can
process other tasks while data transfer is being performed. The transfer of
data is first initiated by the CPU.
DMA controller (DMAC)
is a control unit, part of I/O device’s interface circuit, which can transfer
blocks of data between I/O devices and main memory with minimal intervention
from the processor.
The process requesting
the DMA transfer is paused and the operation is performed, meanwhile another
process is run on the processor.
The data can be
transferred to and from memory by the DMAC in three ways.
In burst mode, the system bus is released only after the data transfer
is completed.
In cycle stealing mode, during the transfer of data between the DMA
channel and I/O device, the system bus is relinquished for a few clock cycles
so that the CPU can perform other tasks. When the data transfer is complete,
the CPU receives an interrupt request from the DMA controller.
In transparent mode, the DMAC can take charge of the system bus only
when it is not required by the processor.
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